Dalsa 1M60 User Manual download pdf (Page 15)

1M60 Camera User’s Manual 15

DALSA C32-10010-01

2.9

Timing

Programmed Integration

The 1M60 pixel clock runs at 20 MHz, so each pixel clock cycle will be 1/20,000,000 or

50 ns. The following diagram and tables describe the correct timing requirements for the

1M60 camera.

Figure 6. 1M60 Timing

“A” represents the number of falling clock edges from the rising edge of VSYNC to the

rising edge of HSYNC.

“B” represents the number of falling clock edges prior to the first word. (Pre-Scan

pixels)

“C” represents the number of words per line.

“D” represents the number of falling clock edges between the last word and the falling

edge of HSYNC. (Post-Scan pixels)

“E” represents the number of falling clock edges between a falling HSYNC and a

rising HSYNC.

“F” represents the number of falling clock edges from the falling edge of HSYNC to

the falling edge of VSYNC

Table 10. HSYNC Pixel Timing

Horizontal

Binning

Mode

A B C D E F

1x 68 14 256 2 24 2

2x 42 12 128 1 15 1

Table 11. VSYNC Pixel Timing (HSYNC falling edges/VSYNC falling edge)

Vertical

Binning

Mode

Pre-Scan

Lines/Frame

Active

Lines/Frame

Post Scan

Lines/Frame

1x 10 1024 10

2x 5 512 5

SYNC

Data

HSYNC

PIXEL

CLOCK

IMPORTANT:

This camera uses

the falling edge of

the pixel clock to

1 2 ... 10 11 12 13 14 15 16 17 18 19 20 ... 31 32

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Dalsa 1M60 User Manual Page 15

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